Addressing Modes of a Central processing unit (CPU)

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Machine instructions refer to a specified source or target objects, they either use and/or act on.

These objects are shown in coded form as a part of the machine instruction, and therefore its effective (logical) memory address has to be determined on or before the actual execution of the command.

The result of the calculation is provided in special elements addressing the hardware (registers) and used in the command execution.

To calculate, various addressing modes (variants) are used, depending on the structure of the command that is defined in a instruction code.

The calculation of the physical addresses on the basis of logical addresses is independent and is performed usually by a memory management unit.

Register addressing

Overview of the main types of addressing

When register addressing, the address is already in a processor register and does not need to be loaded from memory.

If register addressing implicitly  so implicitly is defined for the opcode register (example: the opcode implicitly refers to the accumulator).
With explicit register addressing the register number is entered in a register field of the machine instruction.

Example: | C | R1 | R2 | Add the contents of R1 to the contents of R2 , C = command code , Rn = register (s )

Single-stage addressing

In one-step addressing modes, the effective address can be determined by a single address calculation. Therefore, it must not be accessed again to the memory over the address calculation.

In immediate addressing, the instruction does not address, but contains the operand; usually applicable only for short operands such as ’0 ‘, ’1 ‘, ‘ AB ‘, etc.

In direct addressing, the instruction contains the logical address, so it must be carry out no more address calculation.

In register – indirect addressing, the logical address is already included in an address register of the Central processing unit (CPU). The number of this address register is passed in the machine instruction .

In the indexed addressing, the address calculation is performed by means of addition: The contents of a register is added to the command. One of the two addresses does not typically include a base address, while the other contains an offset to this address.

Example: | C | R1 | R2 | O | Upload Content of R2 + content (offset) into R1, O = Offset

When the program counter uses relative addressing, the new address from the current program counter value and an offset is determined.

Two-stage addressing

In the two-stage addressing mode several calculation steps are necessary to obtain the effective address.

In particular, in the course of the calculation, an additional memory access is necessary. As an example there is the indirect absolute addressing.

In this case, the command contains an absolute memory address. The memory word, which can be found at this address contains the required effective address.

It must therefore be used by the shared memory address in the memory to determine the effective address for the instruction execution. The features of the two-stage process.

Example: | C | R1 | R2 | AA | Upload standing by R1 = R2 + content to Adr (AA) content

Features

The performance of a processor is largely determined by the number of transistors as well as by the word length and the processor clock.

Word width

The word length determines how long can a machine word of the processor, ie, how many bits it can consist of a maximum. Relevant factors include the following values:

Work or data register: The word length determines the maximum size of the processable integers and floating point numbers.
Data bus: The word length determines how many bits can be read from the main memory simultaneously.

Address bus: The word length determines the maximum size of a memory address, ie the maximum amount of memory.
Control bus: The word length determines the type of peripheral ports.

The word width of these units is the same; in modern computers it is 32 or 64 bits.

Processor clock

The clock signal (clock rate) is most often presented in advertising as an assessment criterion for a processor.

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